Distorm64 is a fast disassembler library for the x86-64 instruction set. Main
- It's really fast.
- It supports multi-threading.
- It supports AMD64, and all other 80x86 instruction sets.
- It supports up to date instruction sets, such as VMX and SSE4.
- It handles instruction prefixes in a serious manner.
- Unused/extra prefixes are dropped (output as DB'ed).
- Lock prefix works only on lockable instructions if the first operand is in
the form of memory indirection.
- REPn/z prefix works only on repeatable string instructions as well as I/O
- Segment Override prefixes are possible where memory indirection address is
being used (and specially treated with string and I/O instructions).
- Some SSE2 instructions support pseudo opcodes (CMP family).
- "Native" instructions, those which have the same mnemonic in different
decoding modes, unless there's an operand size prefix, which then a suffix
letter is concatenated to the mnemonic in order to indicate the operation size
(instructions like: PUSHA, IRET, etc.).
- XLAT instruction is treated specially when prefixed.
- Drops invalid instructions when their operands are invalid.
- Won't decode instructions which are longer than 15 bytes.
- CR8 register is now accessible using the Lock prefix in 32 bits decoding
- In 64-bit decoding mode the Segment Override prefixes CS, DS, ES and SS are
Copyright (C) 2003-2007 Gil Dabah, http://ragestorm.net/distorm/
FPU(387) parsing added Feb 2004.
Prefixes parsing added July 2004.
SIB parsing added Dec 2004.
Rep/lock/xlat explicit-operand forms added Dec 2004.
Wrapped in Python Jan 2005.
Using static instructions tables Jan 2005.
MMX parsing added Feb 2005.
SSE parsing added Feb 2005.
SSE2 parsing added March 2005